Total Experience of 3-9 Yrs with in-depth knowledge/experience of System Verilog OVM/UVM. Experience & good understanding of ASIC/SoC pre-silicon verification…
Develop micro-architecture and RTL design for SoCs/Cores. Responsible for block level/ full chip design. 3+ years experience with IP/SoC Design & Integration.
� Work directly with hardware architects, logic designers, IP providers, Physical implementers and Platform validators to influence overall SoC and system…
Collaborate with code generation and verification innovators throughout the company to design and implement world-class FPGA and ASIC verification solutions.
3+ years of solid experience in SoC design. Hands-on experience with SoC Design, Verilog RTL coding. NoC design engineer part of BDC infrastructure (NoC…
Hardware/Software Solutions Development Engineer Job Grade: Design, Deployment, validation and support of next generation emulation/simulation solutions.
2 to 5 years experiences with at the least 1 year experience in SOC and Sub system verification. Should be an expert in Verilog/SV and C *.
Experience with IP configuration and SoC integration is desirable. Experience in Logic Design, Micro-architecture and RTL coding is a must.
Responsible for design and integration of ARM based processor SOC and subsystem. Solid experience in digital VLSI design.
Good understanding and exposure of overall SoC Cycle. You will be responsible for ASIC Physical Design RTL to GDSII Implementation.
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