As an IC Design manager, you will propose and evaluate new architectural proposals for IO design, PLL Clock management circuits and clock distribution, Signal Integrity analysis of high speed IO systems related to DDR and QDR systems, in next generation FPGAs. You will lead the design and development of critical analog circuit blocks in the chip. Architectural enhancements, circuit optimizations and process technology advancements will be applied by you to the blocks as required by design ...
Xilinx - 5 months ago
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