Technical Intern
QLogic - Pune, Maharashtra
See original job posting at QLogic »
In this position, you will be initially trained and subsequently responsible for ASIC verification. This job requires understanding of System Verilog, VERA or NTB, C/C++/SystemC, Perl and ability to utilize good debug/problem analysis techniques.

Required Skills

Exposure to Specman, Verilog, Ethernet, PCIe

Excellent communication

Good analytical skills

Required Experience

QLogic - 28 days ago - save job - block